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fujitsu microelectronics data sheet copyright?2001-2008 fujitsu microelect ronics limited all rights reserved 2008.11 for the information for microcontroller supports, see the following web site. http://edevice.fujitsu.com/micom/en-support/ 8-bit proprietary microcontroller cmos f 2 mc-8l mb89130/130a series mb89131/p131/133a/p133a/135a/ mb89p135a/pv130a description the mb89130/130a series has been developed as a general-purpose version of the f 2 mc*-8l family consisting of proprietary 8-bit, single-chip microcontrollers. in addition to a compact instruction set, the microcontrollers contain a great variety of peripheral functions such as timers, a serial interface, an a/d converter, and external interrupts. the mb89130a series also include a remote control transmitting output and wake-up interrupt function. * : f 2 mc is the abbreviation of fu jitsu flexible microcontroller. features ?f 2 mc-8l family cpu core low-voltage operation (when an a/d converter is not used) low current consumption (applicable to the dual-clock system) minimum execution time : 0.95 s at 4.2 mhz 21-bit timebase timer i/o ports : max. 36 ports external interrupt 1 : 3 channels external interrupt 2 (wake-up function) : 8 channels (only for the mb89130a series) 8-bit serial i/o : 1 channel (continued) ds07-12510-11e
mb89130/130a series 2 ds07-12510-11e (continued) 8/16-bit timer/counter : 1 channel 8-bit a/d converter : 4 channels remote control transmitting frequency generator (for the mb89130a series only) low-power consumption modes (stop, sleep, and watch mode) qfp-48 package, sh-dip-48 package cmos technology
mb89130/130a series ds07-12510-11e 3 product lineup * : varies with conditions such as the operating frequency. (see ? electrical characteristics?.) (continued) part number mb89131 mb89133a mb89135a mb89p133a mb89p131 item classification mass-produced products (mask rom products) one-time prom products rom size 4 k 8 bits (internal mask rom) 8 k 8 bits (internal mask rom) 16 k 8 bits (internal mask rom) 8 k 8 bits (internal prom, to be programmed with general- purpose eprom programmer) 4 k 8 bits (internal prom, to be programmed with general- purpose eprom programmer) ram size 128 8 bits 256 8 bits 128 8 bits cpu functions the number of instructions : instruction bit length : instruction length : data bit length : minimum execution time : minimum interrupt processing time : 136 8 bits 1 to 3 bytes 1, 8, 16 bits 0.95 s at 4.2 mhz 8.57 s at 4.2 mhz ports output ports (n-ch open-drain ports) : output ports (cmos) : i/o ports (cmos) : total : 4 (all also serve as peripherals.) 8 24 (8 ports also serve as peripherals. for mb89130a, 16 ports also serve as.) 36 8/16-bit timer/ counter 8-bit timer/counter 2 channels or a 16-bit event counter 8-bit serial i/o 8 bits lsb/msb first selectable 8-bit a/d converter 8-bit resolution 4 channels a/d conversion mode (minimum conversion time : 42 s at 4.2 mhz) sense mode (minimum conversion time : 11.4 s at 4.2 mhz) capable of continuous acti vation by an internal timer reference voltage input external interrupt 1 3 independent channels (edge selection, interrupt vector, source flag) rising/falling both edges selectable used also for wake-up from stop/sleep mode. (edge detection is also permitted in the stop mode.) external interrupt 2 (wake-up function) ? 8 channels (only for level detection) ? remote control transmitting gener- ator ? 1 channel (pulse width and cycle selectable by program) ? standby mode sleep, stop, and watch mode process cmos operating voltage* 2.2 to 4.0 v (with the dual-clock option) 2.2 to 6.0 v (with the single-clock option) 2.7 v to 6.0 v
mb89130/130a series 4 ds07-12510-11e (continued) part number mb89p135 mb89pv130a item classification one-time prom produc ts piggyback/evaluation product rom size 16 k 8 bits (internal prom, to be programmed with general-purpose eprom programmer) 32 k 8 bits (external rom) ram size 512 8 bits 1 k 8 bits cpu functions the number of instructions instruction bit length instruction length data bit length minimum execution time minimum interrupt processing time : 136 : 8 bits : 1 to 3 bytes : 1, 8, 16 bits : 0.95 s at 4.2 mhz : 8.57 s at 4.2 mhz ports output ports (n-ch open-drain ports) output ports (cmos) i/o ports (cmos) total : 4 (all also serve as peripherals.) : 8 : 24 (8 ports also serve as peripherals. for mb89130a, 16 ports also serve as peripherals.) : 36 8/16-bit timer/ counter 8-bit timer/counter 2 channels or a 16-bit event counter 8-bit serial i/o 8 bits lsb/msb first selectable 8-bit a/d converter 8-bit resolution 4 channels a/d conversion mode (minimum conversion time : 42 s at 4.2 mhz) sense mode (minimum conversion time : 11.4 s at 4.2 mhz) capable of continuous activation by an internal timer reference voltage input external interrupt 1 3 independent channels (selectable edge, interrupt vector, source flag) rising/falling both edges selectable used also for wake-up from the stop/sleep mode. (edge detection is also permitted in the stop mode.) external interrupt 2 (wake-up function) 8 channels (only for level detection) remote control transmitting frequency generator 1 channel (pulse width and cycle selectable by program) standby mode sleep, stop, and watch mode process cmos operating voltage 2.7 v to 6.0 v 2.7 v to 6.0 v eprom for use ? mbm27c256a-20tvm
mb89130/130a series ds07-12510-11e 5 package and corres ponding products : available, : not available differences among products 1. memory size before evaluating using the otprom (one-time prom) products, verify its differences from the product that will actually be used. take particul ar care on the following points : the number of register banks available is different among the mb89131, mb89133a/135a and mb89p135a/ pv130a. the stack area, etc., is set at the upper limit of the ram. 2. current consumption when operated at low spe ed, the product with an otprom will cons ume more current th an the product with a mask rom. however, the same is current consumption in sleep/stop modes. (for more information, see ? electrical characteristics?.) in the case of the mb89pv130a, added is the current consumed by the eprom which is connected to the top socket. 3. mask options functions that can be selected as options and how to designate these options vary with product. before using options, check ? mask opitons?. take particular care on the following point : p40 to p43 must be set to no pull-up resistor when an a/d converter is used. for mb89p135a, pull-up resistor option cannot be set for p40 to p43. each option is fixed on the mb89pv130a. package mb89131 mb89133a mb89135a mb89p133a mb89p131 fpt-48p-m13 dip-48p-m01 mqp-48c-p01 package mb89p135a mb89pv130a fpt-48p-m13 dip-48p-m01 mqp-48c-p01
mb89130/130a series 6 ds07-12510-11e pin assignment (continued) 1 2 3 4 5 6 7 8 9 10 11 12 av cc rst mod0 mod1 x0 x1 v cc x0a x1a p27 p26 p25 36 35 34 33 32 31 30 29 28 27 26 25 p36/int2 p37/bz/(rco) p00/(int20) p01/(int21) p02/(int22) p03/(int23) p04/(int24) p05/(int25) p06/(int26) p07/(int27) p10 p11 48 47 46 45 44 43 42 41 40 39 38 37 p40/an0 p41/an1 p42/an2 p43/an3 avr av ss p30/sck p31/so p32/si p33/ec/sco p34/to/int0 p35/int1 13 14 15 16 17 18 19 20 21 22 23 24 p24 p23 p22 p21 p20 p17 v ss p16 p15 p14 p13 p12 (top view) (fpt-48p-m13) note : parenthesized function is available only for the mb89130a series.
mb89130/130a series ds07-12510-11e 7 (continued) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 p17 p20 p21 p22 p23 p24 p25 p26 p27 x1a x0a v cc x1 x0 mod1 mod0 rst av cc p40/an0 p41/an1 p42/an2 p43/an3 avr av ss v ss p16 p15 p14 p13 p12 p11 p10 p07/(int27) p06/(int26) p05/(int25) p04/(int24) p03/(int23) p02/(int22) p01/(int21) p00/(int20) p37/bz/(rco) p36/int2 p35/int1 p34/to/int0 p33/ec/sco p32/si p31/so p30/sck (top view) (dip-48p-m01) note : parenthesized function is available only for the mb89130a series.
mb89130/130a series 8 ds07-12510-11e (continued) 1 2 3 4 5 6 7 8 9 10 11 12 av cc rst mod0 mod1 x0 x1 v cc x0a x1a p27 p26 p25 36 35 34 33 32 31 30 29 28 27 26 25 p36/int2 p37/bz/(rco) p00/int20 p01/int21 p02/int22 p03/int23 p04/int24 p05/int25 p06/int26 p07/int27 p10 p11 48 47 46 45 44 43 42 41 40 39 38 37 p40/an0 p41/an1 p42/an2 p43/an3 avr av ss p30/sck p31/so p32/si p33/ec/sco p34/to/int0 p35/int1 p24 p23 p22 p21 p20 p17 v ss p16 p15 p14 p13 p12 (top view) (mqp-48c-p01) 13 14 15 16 17 18 19 20 21 22 23 24 77 78 79 80 49 50 51 52 68 67 66 65 64 63 62 61 69 70 71 72 73 74 75 61 70 59 68 57 56 55 54 53 pin assignment on package top n.c. : internally connected. do not use. pin no. pin name pin no. pin name pin no. pin name pin no. pin name 49 v pp 57 n.c. 65 o4 73 oe 50a1258a266o574n.c. 51 a7 59 a1 67 o6 75 a11 52 a6 60 a0 68 o7 76 a9 53 a5 61 o1 69 o8 77 a8 54 a4 62 o2 70 ce 78 a13 55 a3 63 o3 71 a10 79 a14 56 n.c. 64 v ss 72 n.c. 80 v cc
mb89130/130a series ds07-12510-11e 9 pin description *1 : dip-48p-m01 *2 : fpt-48p-m13 (continued) pin no. pin name circuit type function sh-dip *1 qfp *2 35 5 x0 a main clock crystal oscillator pins (max. 4.2 mhz) 36 6 x1 38 8 x0a b subclock crystal oscillator pins (32.768 khz) 39 9 x1a 33 3 mod0 c operation mode selecting pins connect directly to v ss . 34 4 mod1 32 2 rst d reset i/o pin this pin is of n-ch open-drain output type with pull-up re- sistor, and a hysteresis input type. the internal circuit is initialized by the inpu t of ?l?. ?l? is output from this pin by an internal reset source as a option. 16 to 9 34 to 27 p00 (int20 ) to p07 (int27 ) i general-purpose i/o ports on the mb89130a series, these ports also serve as an ex- ternal interrupt input. external interrupt inputs are of hysteresis input type. 8 to 2, 48 26 to 20, 18 p10 to p17 e general-purpose i/o ports 47 to 40 17 to 10 p20 to p27 g general-purpose output ports 24 42 p30/sck f general-purpose i/o port also serves as the clock i/o for the 8-bit serial i/o. this port is of hysteresis input type. 23 41 p31/so f general-purpose i/o port also serves as a 8-bit serial i/o data output. this port is of hysteresis input type. 22 40 p32/si f general-purpose i/o port also serves as a 8-bit serial i/o data input. this port is of hysteresis input type. 21 39 p33/ec/sco f general-purpose i/o port also serves as the external clock input for the 8-bit timer/counter. this port is of hysteresis input type. the system clock output is provided as an option. 20 38 p34/to/int0 f general-purpose i/o port also serve as the overflow output for the 8-bit timer/ counter and an external interrupt input. this port is of hys- teresis input type. 19, 18 37, 36 p35/int1, p36/int2 f general-purpose i/o ports also serves as an external interrupt input. these ports are of hysteresis input type.
mb89130/130a series 10 ds07-12510-11e (continued) *1 : dip-48p-m01 *2 : fpt-48p-m13 pin no. pin name circuit type function sh-dip *1 qfp *2 17 35 p37/bz/ (rco) f general-purpose i/o port also serves as a buzzer output. this port is of hysteresis input type. on the mb89130a series, this port also serves as a remote control output. 30 to 27 48 to 45 p40/an0 to p43/an3 h n-ch open-drain output ports also serve as an analog input for the a/d converter. 37 7 v cc ? power supply pin 119 v ss ? power supply (gnd) pin 31 1 av cc ? a/d converter power supply pin use this pin at the same voltage as v cc. 26 44 avr ? a/d converter reference voltage input pin 25 43 av ss ? a/d converter power supply pin use this pin at the same voltage as v ss.
mb89130/130a series ds07-12510-11e 11 external eprom pins ( mb89pv130a only ) pin no. pin name i/o function 49 v pp o ?h? level output pin 50 51 52 53 54 55 58 59 60 a12 a7 a6 a5 a4 a3 a2 a1 a0 o address output pins 61 62 63 o1 o2 o3 i data input pins 64 v ss o power supply (gnd) pin 65 66 67 68 69 o4 o5 o6 o7 o8 i data input pins 70 ce o rom chip enable pin outputs ?h? during standby. 71 a10 o address output pin 73 oe o rom output enable pin outputs ?l? at all times. 75 76 77 78 79 a11 a9 a8 a13 a14 o address output pins 80 v cc o eprom power supply pin 56 57 72 74 n.c. ? internally connected pins be sure to leave them open.
mb89130/130a series 12 ds07-12510-11e i/o circuit type (continued) type circuit remarks a crystal or ceramic oscillation type (main clock) circuit for the mb89p133a/p131/p135a/pv130a external clock input selecting versions of mb89131/ 133a/135a oscillation feedback resi stor of approximately 1 m ? /5 v crystal or ceramic osc illation type (main clock) crystal or ceramic oscillation selecting versions of mb89131/133a/135a oscillation feedback resi stor of approximately 1 m ? /5 v b crystal and ceramic oscillation type (subclock) circuit for the mb89131/133a/135a oscillation feedback resi stor of approximately 4.5 m ? /5 v crystal and ceramic oscillation type (subclock) circuit for the mb89p131/p133a/p135a/pv130a oscillation feedback resi stor of approximately 4.5 m ? /5 v c d output pull-up resistor (p-ch) of approximately 50 k ? /5 v hysteresis input x0 standby control signal x1 x1 x0 standby control signal x1a x0a standby control signal x0a standby control signal x1a r p-ch n-ch
mb89130/130a series ds07-12510-11e 13 (continued) type circuit remarks e cmos output cmos input pull-up resistor optional f cmos output hysteresis input pull-up resistor optional g cmos output h n-ch open-drain output analog input pull-up resistor optional i cmos output cmos input the interrupt input is a hysteresis input (available only for the mb89130a series) . pull-up resistor optional p-ch n-ch r p-ch n-ch r p-ch n-ch n-ch analog input r p-ch p-ch n-ch interrupt input only for mb89130a series p-ch
mb89130/130a series 14 ds07-12510-11e handling devices 1. preventing latchup latchup may occur on cmos ics if voltage higher than v cc or lower than v ss is applied to input and output pins other than medium- and high-voltage pins or if higher than the voltage which shows on ?1. absolute maximum ratings? in ? electrical characteristics? is applied between v cc and v ss . when latchup occurs, power supply current increases rapidly and might thermally damage elements. when using, take great care not to exceed the absolute maximum ratings. also, take care to prevent the analog power supply (av cc and avr) and analog input from exceeding the digital power supply (v cc ) when the analog system power supply is turned on and off. 2. treatment of unused input pins leaving unused input pins open could cause malfunctions. they should be connected to a pull-up or pull-down resistor. 3. treatment of power supply pins on microcontrollers with a/d converter connect to be av cc = v cc and av ss = avr = v ss even if the a/d converter are not in use. 4. treatment of n.c. pins be sure to leave (internally connected) n.c. pins open. 5. power supply voltage fluctuations although operation is assured within the rated range of v cc power supply voltage, a rapid fluctuation of the voltage could cause malfuncti ons, even if it occurs within the rated range. stabilizing voltage supplied to the ic is therefore impo rtant. as stabilizatio n guidelines, it is recommended to control power so that v cc ripple fluctu- ations (p-p value) will be less than 10 % of the standard v cc value at the commercial frequency (50 to 60 hz) and the transient fluctuation rate will be less than 0.1 v/ ms at the time of a moment ary fluctuation such as when power is switched. 6. precautions when using an external clock when an external clock is used, oscillation stabilization time is required even for power-on reset (optional) and wake-up from stop mode. 7. turning on the supply voltage (only for the mb89p135a) power on sharply up to the option ena bling voltage (2 v) within 13 clock cycles after starting of oscillation.
mb89130/130a series ds07-12510-11e 15 programming to the eprom on the mb89p131 the mb89p131 is an otprom version of the mb89131. 1. features 4-kbyte prom on chip equivalency to the mbm27c256a in eprom mode (when programmed with the eprom programmer) 2. memory space memory space in eprom mode is diagrammed below. 3. programming to the eprom in eprom mode, the mb89p131 functions equivalent to the mbm27c256a. this allows the prom to be programmed with a general-purpose eprom programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. programming procedure (1) set the eprom programmer for the mbm27c256a. (2) load program data into the eprom programmer at 7000 h to 7fff h (note that addresses f000 h to ffff h while operating as a single chip correspond to 7000 h to 7fff h in eprom mode) . (3) program with the eprom programmer. 0000 h 0080 h 00c0 h f000 h ffff h i/o ram not available prom 4 kb 7000 h 7fff h not available eprom 4 kb 0000 h single chip eprom mode (corresponding addresses on the eprom programmer) not available address 0140 h
mb89130/130a series 16 ds07-12510-11e programming to the eprom on the mb89p133a the mb89p133a is an otprom version of the mp89133a. 1. features 8-kbyte prom on chip equivalency to the mbm27c256a in eprom mode (when programmed with the eprom programmer) 2. memory space memory space in eprom mode is diagrammed below. 3. programming to the eprom in eprom mode, the mb89p133a functions equivalent to the mbm27c256a. this allows the prom to be programmed with a general-purpose eprom programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. programming procedure (1) set the eprom programmer for the mbm27c256a. (2) load program data into the eprom programmer at 6000 h to 7fff h (note that addresses e000 h to ffff h while operating as a single chip correspond to 6000 h to 7fff h in eprom mode) . (3) program with the eprom programmer. 0000 h 0080 h e000 h ffff h i/o ram not available prom 8 kb 6000 h 7fff h not available eprom 8 kb 0000 h eprom mode (corresponding addresses on the eprom programmer) single chip address 0180 h
mb89130/130a series ds07-12510-11e 17 programming to the ep rom on the mb89p135a the mb89p135a is an otprom version of the mb89133a/135a. 1. features 16-kbyte prom on chip equivalency to the mbm27c256a in eprom mode (when programmed with the eprom programmer) 2. memory space memory space in eprom mode is diagrammed below. 3. programming to the eprom in eprom mode, the mb89p135a functions equivalent to the mbm27c256a. this allows the prom to be programmed with a general-purpose eprom programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. programming procedure (1) set the eprom programmer for the mbm27c256a. (2) load program data into the eprom programmer at 4000 h to 7fff h (note that addresses c000 h to ffff h while operating as a single chip correspond to 4000 h to 7fff h in eprom mode) . (3) load option data into the eprom programmer at 3ff0 h to 3ff6 h . (4) program with the eprom programmer. 0000 h 0080 h bff6 h bff0 h c000 h ffff h i/o ram not available not available not available not available prom 16 kb eprom mode (corresponding addresses on the eprom programmer) single chip address 0280 h 8000 h vacancy (read value ff h ) vacancy (read value ff h ) option area eprom 16 kb 0000 h 3ff6 h 7fff h 3ff0 h 4000 h
mb89130/130a series 18 ds07-12510-11e 4. setting otprom options (mb89p135a only) the programming procedure is the same as that for the prom. options can be set by programming values at the addresses shown on the memory map. the relationship between bits and options is shown on the following bit map : otprom option bit map note : each bit is set to ?1? as the initialized value, therefore the pull-up option is selected. ad- dress bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3ff0 h vacancy readable and writable vacancy readable and writable vacancy readable and writable clock mode selection 1 : single clock 0 : dual clock reset pin output 1 : yes 0 : no power-on reset 1 : yes 0 : no oscillation stabilization time 00 : 2 2 /f ch 01 : 2 12 /f ch 10 : 2 16 /f ch 11 : 2 18 /f ch 3ff1 h p07 pull-up 1 : yes 0 : no p06 pul-up 1 : yes 0 : no p05 pull-up 1 : yes 0 : no p04 pull-up 1 : yes 0 : no p03 pull-up 1 : yes 0 : no p02 pull-up 1 : yes 0 : no p01 pull-up 1 : yes 0 : no p00 pull-up 1 : yes 0 : no 3ff2 h p17 pull-up 1 : no 0 : yes p16 pull-up 1 : no 0 : yes p15 pull-up 1 : yes 0 : no p14 pull-up 1 : yes 0 : no p13 pull-up 1 : yes 0 : no p12 pull-up 1 : yes 0 : no p11 pull-up 1 : yes 0 : no p10 pull-up 1 : yes 0 : no 3ff3 h p37 pull-up 1 : yes 0 : no p36 pull-up 1 : yes 0 : no p35 pull-up 1 : yes 0 : no p34 pull-up 1 : yes 0 : no p33 pull-up 1 : yes 0 : no p32 pull-up 1 : yes 0 : no p31 pull-up 1 : yes 0 : no p30 pull-up 1 : yes 0 : no 3ff4 h vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable 3ff5 h vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable 3ff6 h vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable vacancy readable and writable
mb89130/130a series ds07-12510-11e 19 handling the mb89p 131/p133a/p135a 1. recommended screening conditions high-temperature aging is recommended as the pre-assembly screening procedure. 2. programming yield due to its nature, bit programming test can?t be conducted as fujitsu delivery test. for this reason, a programming yield of 100 % cannot be assured at all times. program, verify aging + 150 c, 48 h data verification assembly
mb89130/130a series 20 ds07-12510-11e programming to the eprom with piggyback/evaluation device 1. eprom for use mbm27c256a-20tvm 2. memory space memory space in each mode, such as 32-kbyte prom is diagrammed below. 3. programming to the eprom (1) set the eprom programmer for the mbm27c256a. (2) load program data into the eprom programmer at 0000 h to 7fff h . (3) program with the eprom programmer. prom 32 kb ffff h 0000 h 8000 h 0080 h 0480 h single chip i/o ram not available 7fff h 0000 h eprom 32 kb corresponding addresses on the eprom programmer address
mb89130/130a series ds07-12510-11e 21 block diagram main clock oscillator timebase timer external interrupt 2 * (wake-up function) cmos i/o port cmos output port ports 0 and 1 f 2 mc-8l ram mod0, mod1, v cc , v ss the other pins x0 x1 rst p00/ (int20) rom 8-bit serial i/o buzzer output n-ch open-drain output port p30/sck p34/to/int0 internal bus cpu 8-bit timer/counter cmos i/o port 8 8 p10 to p17 reset circuit (wdt) external interrupt 1 8-bit timer/counter p33/ec/sco p32/si p31/so p35/int1 p36/int2 p37/bz/(rco) p40/an0 to p43/an3 subclock oscillator (32.768 khz) 8 remote control* transmitting frequency generator clock controller 4 x0a x1a 8-bit a/d converter 4 avr av cc av ss to p07/ (int27) port 2 port 3 port 4 p20 to p27 * : only for the mb89130a series. note : parenthesized pin function is only for the mb89130a series.
mb89130/130a series 22 ds07-12510-11e cpu core 1. memory space the microcontrollers of the mb89130/130a series offer a memory space of 64 kbytes for storing all of i/o, data, and program areas. the i/o area is allocated from the lowest address. the data area is allocated immediately above the i/o area. the data area can be divided into register, stack, and direct areas according to the application. the program area is allocated from exactly the opposite end, that is, near the highest address. the tables of interrupt reset vectors and vector call instructions are allocated from the highest address within the program area. the memory space of t he mb89130/130a series is st ructured as illustrated below. rom 4 kb mb89p131 mb89131 ram 128 b i/o register 0000 h 007f h 00c0 h 0100 h 013f h 0140 h efff h ffff h f000 h vacancy vacancy rom 8 kb mb89p133a mb89133a ram 256 b i/o register 0000 h 007f h 0080 h 00ff h 0100 h 017f h 0180 h dfff h ffff h e000 h vacancy rom 16 kb mb89135a ram 256 b i/o register 0000 h 007f h 0080 h 00ff h 0100 h 017f h 0180 h bfff h ffff h c000 h bfff h c000 h vacancy rom 16 kb mb89p135a ram 512 b i/o register 0000 h 007f h 0080 h 00ff h 0100 h 027f h 0280 h 01ff h 0200 h 01ff h 0200 h ffff h vacancy external rom 32 kb mb89pv130a ram 1 kb i/o register 0000 h 007f h 0080 h 00ff h 0100 h 7fff h ffff h 8000 h vacancy 047f h 0480 h memory space
mb89130/130a series ds07-12510-11e 23 2. registers the f 2 mc-8l family has two types of registers; dedicated hardware registers in the cpu and general-purpose memory registers. the following registers are provided : the ps can further be divided into higher 8 bits for use as a register bank pointer (rp) and the lower 8 bits for use as a condition code register (ccr) . (see the diagram below.) program counter (pc) : a 16-bit register for indicating the instruction storage positions. accumulator (a) : a 16-bit temporary register for storing arithmetic operations, etc. when the instruction is an 8-bit data processing instruction, the lower byte is used. temporary accumulator (t) : a 16-bit register which is used for arithmetic operations with the accumulator when the instruction is an 8-bit data processing instruction, the lower byte is used. index register (ix) : a 16-bit register for index modification extra pointer (ep) : a 16-bit pointer for indicating a memory address stack pointer (sp) : a 16-bit pointer for indicating a stack area program status (ps) : a 16-bit register for storing a register pointer, a condition code pc a t ix ep sp ps 16 bits : program counter : accumulator : temporary accumulator : index register : extra pointer : stack pointer : program status fffd h indeterminate indeterminate indeterminate indeterminate indeterminate i-flag = 0, il1, 0 = 11 the other bit values are indeterminate. initial value vacancy h i il1, 0 n z vc 54 rp ps 109876 3210 15 14 13 12 11 rp ccr vacancy vacancy structure of the program status register
mb89130/130a series 24 ds07-12510-11e the rp indicates the address of the register bank currently in use. the relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. the ccr consists of bits indicating the results of arithm etic operations and the cont ents of transfer data, and bits for control of cpu operations at the time of an interrupt. h-flag : set to ?1? when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. cleared to ?0? otherwise. this flag is for decimal adjustment instructions. i-flag : interrupt is enabled when this flag is set to ?1?. interrupt is disabled when the flag is cleared to ?0?. cleared to ?0? at the reset. il1, 0 : indicates the level of the interrupt currently allowed. processes an interrupt only if its request level is higher than the value indicated by this bit. il1 il0 interrupt level high-low 00 1 high low 01 10 2 11 3 n-flag : set to ?1? if the msb becomes ?1? as the result of an arithmetic operation. cleared to ?0? otherwise. z-flag : set to ?1? when an arithmetic operatio n results in ?0?. clea red to ?0? otherwise. v-flag : set to ?1? if the complement on ?2? overflows as a result of an arithmetic operation. cleared to ?0? if the overflow does not occur. c-flag : set to ?1? when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. cleared to ?0? otherwise. set to the shift-out value in the case of a shift instruction. ?0? a15 ?0? a14 ?0? a13 ?0? a12 ?0? a11 ?0? a10 ?0? a9 ?1? a8 r4 a7 r3 a6 r2 a5 r1 a4 r0 a3 b2 a2 b1 a1 b0 a0 rp generated addresses lower op codes rule for conversion of actual addresses of the general - purpose register area
mb89130/130a series ds07-12510-11e 25 the following general-purpose registers are provided : general-purpose registers : an 8-bit resister for storing data the general-purpose registers are of 8 bits and located in the register banks of the memory. one bank contains eight registers. up to a total of 8 banks can be used on the mb89131/p131 and a total of 16 banks can be used on the mb89133a/p133a/135a and a total of 32 banks can be used on the mb89p135a/pv130a. the bank currently in use is indicated by the register bank pointer (rp) . this address = 0100 h + 8 (rp) memory area 8 banks (mb89131/p131) 16 banks (mb89133a/p133a/135a) 32 banks (mb89p135a/pv130a) r0 r1 r2 r3 r4 r5 r6 r7 register bank configuration
mb89130/130a series 26 ds07-12510-11e i/o map (continued) address read/write register name register description 00 h (r/w) pdr0 port 0 data register 01 h (w) ddr0 port 0 data direction register 02 h (r/w) pdr1 port 1 data register 03 h (w) ddr1 port 1 data direction register 04 h (r/w) pdr2 port 2 data register 05 h vacancy 06 h vacancy 07 h (r/w) sycc system clock control register 08 h (r/w) stbc standby control register 09 h (r/w) wdtc watchdog timer control register 0a h (r/w) tbtc timebase timer control register 0b h (r/w) wpcr watch prescaler control register 0c h (r/w) pdr3 port 3 data register 0d h (w) ddr3 port 3 data direction register 0e h (r/w) pdr4 port 4 data register 0f h (r/w) bzcr buzzer register 10 h vacancy 11 h vacancy 12 h (r/w) scgc peripheral control clock register 13 h vacancy 14 h (r/w) rcr1 remote control transmitting control register 1* 15 h (r/w) rcr2 remote control transmitting control register 2* 16 h vacancy 17 h vacancy 18 h (r/w) t2cr timer 2 control register 19 h (r/w) t1cr timer 1 control register 1a h (r/w) t2dr timer 2 data register 1b h (r/w) t1dr timer 1 data register 1c h (r/w) smr serial mode register 1d h (r/w) sdr serial data register 1e h vacancy 1f h vacancy
mb89130/130a series ds07-12510-11e 27 (continued) * : only for the mb89130a series note : do not use vacancies. address read/write register name register description 20 h (r/w) adc1 a/d converter control register 1 21 h (r/w) adc2 a/d converter control register 2 22 h (r/w) adcd a/d converter data register 23 h (r/w) eic1 external interrupt 1 control register 1 24 h (r/w) eic2 external interrupt 1 control register 2 25 h vacancy 26 h to 31 h vacancy 32 h (r/w) eie2 external interrupt 2 enable register* 33 h (r/w) eif2 external interrupt 2 flag register* 34 h to 7b h vacancy 7c h (w) ilr1 interrupt level setting register 1 7d h (w) ilr2 interrupt level setting register 2 7e h (w) ilr3 interrupt level setting register 3 7f h vacancy
mb89130/130a series 28 ds07-12510-11e electrical characteristics 1. absolute maximum ratings (av ss = v ss = 0.0 v) * : use av cc and v cc set to the same voltage. take care so that av cc does not exceed v cc , such as when power is turned on. warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. parameter symbol value unit remarks min. max. power supply voltage v cc av cc v ss ? 0.3 v ss + 7.2 v * avr v ss ? 0.3 v ss + 7.2 v avr must not exceed v cc + 0.3 v program voltage v pp v ss ? 0.6 v ss + 13.0 v only for the mb89p131/p133a/ p135a input voltage v i v ss ? 0.3 v cc + 0.3 v output voltage v o v ss ? 0.3 v cc + 0.3 v ?l? level maximum output current i ol ? 10 ma ?l? level average output current i olav ? 4ma average value (operating current operating rate) ?l? level total maximum output cur- rent i ol ? 100 ma ?l? level total average output cur- rent i olav ? 20 ma average value (operating current operating rate) ?h? level maximum output current i oh ? ?10 ma ?h? level average output current i ohav ? ?2 ma average value (operating current operating rate) ?h? level total maximum output cur- rent i oh ? ?30 ma ?h? level total average output cur- rent i ohav ? ?10 ma average value (operating current operating rate) power consumption p d ? 200 mw operating temperature t a ? 40 + 85 c storage temperature tstg ? 55 + 150 c
mb89130/130a series ds07-12510-11e 29 2. recommended operating conditions (av ss = v ss = 0.0 v) * : these values vary with the operating frequencies and the analog assurance range. see figure 1 and 2, and ?5. a/d converter electr ical characteristics?. parameter symbol value unit remarks min. max. power supply voltage v cc av cc 2.2* 6.0* v normal operation assurance range* mb89131/133a/135a 2.7* 6.0* v normal operation assurance range* mb89p131/p133a/135a/pv130a 1.5 6.0 v retains the ram state in the stop mode avr 2.0 av cc v operating temperature t a ? 40 + 85 c 1 2 3 4 5 6 operation assurance range 1234 4.0 2.0 1.0 main clock oprating frequency (at an instruction cycle of 4/f ch ) (mhz) minimum execution time (instruction cycle) (s) operating voltage (v) figure 1 operating voltage vs. main clock operating frequency ( mb89p131 / p133a / p135a / pv130a , and single - clock mb89131 / 133 / 133a / 135 / 135a ) note : the shaded area is assured only for the mb89131/133/133a/135/135a.
mb89130/130a series 30 ds07-12510-11e figure 1 and 2 indicate the operating frequency of the external oscillator at an instruction cycle of 4/f ch . since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the oper- ating speed is switched using a gear. warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the device's el ectrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within thei r recommended operating condition ranges. operation outside these ranges ma y adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operat ing conditions, or combinations not represented on the data sheet. users considering application outsi de the listed conditions are advised to contact their representatives beforehand. 1 2 3 4 5 6 operation assurance range 1234 4.0 2.0 1.0 operating voltage (v) main clock oprating frequency (at an instruction cycle of 4/f ch ) (mhz) minimum execution time (instruction cycle) (s) figure 2 operating voltage vs. main clock operating frequency ( dual - clock mb89131 / 133 / 133a / 135 / 135a )
mb89130/130a series ds07-12510-11e 31 3. dc characteristics (av cc = v cc = + 5.0 v, av ss = v ss = 0.0 v, t a = ? 40 c to + 85 c) (continued) parameter sym- bol pin condition value unit remarks min. typ. max. ?h? level input voltage v ih p00 to p07, p10 to p17 ? 0.7 v cc ? v cc + 0.3 v v ihs rst , p30 to p37, int20 to int27 0.8 v cc ? v cc + 3.0 v int20 to int27 are available only for the mb89130a se- ries. ?l? level input voltage v il p00 to p07, p10 to p17 v ss ? 0.3 ? 0.3 v cc v v ils rst , p30 to p37 int20 to int27 v ss ? 0.3 ? 0.2 v cc v int20 to int27 are available only for the mb89130a se- ries. open-drain output pin applied voltage v d p40 to p43 v cc ? 0.3 ? v cc + 0.3 v ?h? level output voltage v oh p00 to p07, p10 to p17, p20 to p27, p30 to p37 i oh = ? 2.0 ma 2.4 ?? v ?l? level output voltage v ol p00 to p07, p10 to p17, p20 to p27, p30 to p37, p40 to p43 i ol = 1.8 ma ?? 0.4 v v ol2 rst i ol = 4.0 ma ?? 0.6 v input leakage current (hi-z output leakage current) i li1 p00 to p07, p10 to p17, p20 to p27, p30 to p37, p40 to p43, mod0, mod1 0.0 v < v i < v cc ?? 5 a without pull-up resistor pull-up resistance r pull p00 to p07, p10 to p17, p30 to p37, p40 to p43, rst v i = 0.0 v 25 50 100 k ?
mb89130/130a series 32 ds07-12510-11e (continued) (av cc = v cc = + 5.0 v, av ss = v ss = 0.0 v, t a = ? 40 c to + 85 c) *1 : the power supply current is measured at the external clock. *2 : for information on t inst , see ? (4) instruction cycle? in ?4. ac characteristics?. parameter sym- bol pin condition value unit remarks min. typ. max. power supply current *1 i cc1 v cc (external clock opera- tion) f ch = 4.00 mhz v cc = 5.0 v t inst *2 = 1.0 s ? 47ma mb89131/ 133a/135a ? 610ma mb89p131/ p133a/p135a i ccs1 f ch = 4.00 mhz v cc = 5.0 v t inst *2 = 1.0 s main clock sleep mode ? 25ma i ccl f cl = 32.768 khz v cc = 3.0 v subclock mode ? 50 100 a mb89131/ 133a/135a ? 13ma mb89p131/ p133a/p135a i ccls f cl = 32.768 khz v cc = 3.0 v subclock sleep mode ? 25 50 a i cct f cl = 32.768 khz v cc = 3.0 v ? watch mode ? main clock stop mode in dual- clock system ?? 15 a i cch t a = + 25 c ? subclock stop mode ? main clock stop mode in single- clock system ?? 1 a i a av cc f ch = 4 mhz, when a/d conversion is op- erating ? 13ma i ah av cc f ch = 4 mhz, t a = + 25 c, when a/d conversion is not operating ?? 1 a input capacitance c in other than av cc , av ss , v cc , and v ss f = 1 mhz ? 10 ? pf
mb89130/130a series ds07-12510-11e 33 4. ac characteristics (1) reset timing (v cc = + 5.0 v 10 % , av ss = v ss = 0.0 v, t a = ? 40 c to + 85 c) * : t hcyl is the oscillation cycle (1/f ch ) to input to the x0 pin. (2) power-on reset (av ss = v ss = 0.0 v, t a = ? 40 c to + 85 c) note : make sure that power supply rises wit hin the oscillation stab ilization time selected. for example, when the main clock is operating at 3 mhz (f ch ) and the oscillation stabilization time selecting option has been set to 2 12 /f ch , the oscillation stabilization time is 1. 4 ms. therefore, the maximum value of power supply rising time is about 1.4 ms. rapid changes in power supply voltag e may cause a power-on reset. if power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. parameter symbol condition value unit remarks min. max. rst ?l? pulse width t zlzh ? 48 t hcyl * ? ns parameter symbol condition value unit remarks min. max. power supply rising time t r ? ? 50 ms power-on reset function only power supply cut-off time t off 1 ? ms due to repeated operations t zlzh 0.2 v cc 0.2 v cc 0.8 v cc rst 0.2 v 0.2 v 2.0 v v cc 0.2 v t r t off
mb89130/130a series 34 ds07-12510-11e (3) clock timing (v ss = 0.0 v, t a = ? 40 c to + 85 c) parameter symbol pin value unit remarks min. typ. max. input clock frequency f ch x0, x1 1 ? 4.2 mhz main clock f cl x0a, x1a ? 32.768 ? khz subclock clock cycle time t hcyl x0, x1 238 ? 1000 ns main clock t lcyl x0a, x1a ? 30.5 ? s subclock input clock pulse width p wh1 p wl1 x0 30 ?? ns external clock input clock rising/falling time t cr1 t cf1 x0 ?? 24 ns external clock x0 0.8 v cc 0.2 v cc x0 x1 p wh1 c 0 c 1 f ch when a crystal or ceramic resonator is used open x0 x1 when an external clock is used f ch t hcyl p wl1 t cf1 0.8 v cc 0.8 v cc 0.2 v cc t cr1 ? x0 and x1 timing and conditions of applied voltage main clock conditions
mb89130/130a series ds07-12510-11e 35 (4) instruction cycle parameter symbol value unit remarks instruction cycle (minimum execution time) t inst 4/f ch , 8/f ch , 16/f ch , 64/f ch s (4/f ch ) t inst = 1.0 s when operating at f ch = 4 mhz 2/f cl s t inst = 61.036 s when operating at f cl = 32.768 khz x0a x1a c 0 c 1 f cl x0a x1a open rd 0.8 v cc x0a t lcyl when a crystal or ceramic resonator is used when a single-clock option is used 0.8 v cc x0a and x1a timing and conditions of applied voltage subclock conditions
mb89130/130a series 36 ds07-12510-11e (5) serial i/o timing (v cc = + 5.0 v 10 % , av ss = v ss = 0.0 v, t a = ? 40 c to + 85 c) * : for information on t inst , see ? (4) instruction cycle?. parameter symbol pin condition value unit remarks min. max. serial clock cycle time t scyc sck internal shift clock mode 2 t inst * ? s sck so time t slov sck, so ? 200 200 ns valid si sck t ivsh si, sck 200 ? ns sck valid si hold time t shix sck, si 200 ? ns serial clock ?h? pulse width t shsl sck external shift clock mode 1 t inst * ? s serial clock ?l? pulse width t slsh 1 t inst * ? s sck so time t slov sck, so 0 200 ns valid si sck t ivsh si, sck 200 ? ns sck valid si hold time t shix sck, si 200 ? ns
mb89130/130a series ds07-12510-11e 37 0.8 v 2.4 v t scyc 2.4 v t slov 0.2 v cc t shix 0.8 v 0.8 v t ivsh 0.8 v cc 0.2 v cc 0.8 v cc sck so si t slsh 2.4 v t slov 0.2 v cc t shix 0.8 v cc 0.8 v t ivsh 0.8 v cc 0.2 v cc 0.8 v cc t shsl 0.8 v cc 0.2 v cc 0.2 v cc so si sck internal shift clock mode external shift clock mode
mb89130/130a series 38 ds07-12510-11e (6) peripheral input timing (v cc = + 5.0 v 10 % , av ss = v ss = 0.0 v, t a = ? 40 c to + 85 c) * : for information on t inst , see ? (4) instruction cycle?. parameter symbol pin condition value unit remarks min. max. peripheral input ?h? level pulse width 1 t ilih1 ec, int0 to int2 ? 2 t inst * ? s peripheral input ?l? level pulse width 1 t ihil1 2 t inst * ? s 0.2 v cc 0.8 v cc t ihil1 0.8 v cc ec, int0 to int2 0.2 v cc t ilih1
mb89130/130a series ds07-12510-11e 39 5. a/d converter electrical characteristics (av cc = v cc = + 3.5 v to + 6.0 v, f ch = 3 mhz, av ss = v ss = 0.0 v, t a = ? 40 c to + 85 c) * : for information on t inst , see ? (4) instruction cycle? in ?4. ac characteristics?. 6. a/d converter glossary resolution analog changes that are identifiable by the a/d converter. when the number of bits is 8, analog voltage can be divided into 2 8 = 256. linearity error (unit : lsb) the deviation of the straight line connecting the zero transition point (?0000 0000? ? ?0000 0001?) with the full-scale transition point (?1111 1111? ? ?1111 1110?) from actual conversion characteristics. differential linearity error (unit : lsb) the deviation of input voltage needed to change the output code by 1 lsb from the theoretical value. parameter symbol pin condition value unit remarks min. typ. max. resolution ? ? avr = av cc = 5.0 v ?? 8bit total error avr = av cc ?? 1.5 lsb linearity error ?? 1.0 lsb differential linearity error ?? 0.9 lsb zero transition voltage v ot av ss ? 1.0 lsb av ss + 0.5 lsb av ss + 2.0 lsb v 1lsb = (avr ? av ss ) /256 full-scale transition voltage v fst avr ? 3.0 lsb avr ? 1.5 lsb avr v interchannel disparity ? ?? 0.5 lsb a/d mode conversion time ? ? 44 t inst * ? s sense mode conversion time ? 12 t inst * ? s analog port input current i ain an0 to an3 ?? 10 a analog input voltage ? 0 ? avr v reference voltage ? avr 2.0 ? av cc v reference voltage supply current i r avr = av cc = 5.0 v, when a/d conversion is operating ? 100 300 a i rh avr = av cc = 5.0 v, when a/d conversion is not operating ?? 1 a
mb89130/130a series 40 ds07-12510-11e total error (unit : lsb) the difference between theoretical and actual conversion values linearity error (1 lsb n + v ot ) digital output v ot v nt v (n + 1)t v fst theoretical conversion value 1111 1111 1111 1110 0000 0010 0000 0001 0000 0000 1 lsb = (avr ? av ss ) 256 v nt ? (1 lsb n + v ot ) 1 lsb ? 1 v (n + 1)t ? v nt 1 lsb total error = differential linearity error = linearity error = v nt ? (1 lsb n + 1 lsb) 1 lsb analog input actual conversion value
mb89130/130a series ds07-12510-11e 41 7. notes on using a/d converter input impedance of the analog input pins the a/d converter used for the mb8913 0/130a series contains a sample & hold circuit as illustrated below to fetch analog input voltage into the sample & hold capacitor for eight instruction cycles after starting a/d conver- sion. for this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage might not stabilize within the analog input sampling peri od. therefore, it is reco mmended to keep the output impedance of the external circuit low (below 10 k ? ) . note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of approx. 0.1 f for the analog input pin. error the smaller the | avr ? av ss |, the greater the error would become relatively. sample & hold circuit comparator analog input pin c = 28 pf . . r = 9 k ? . . close for 8 instruction cycles after starting a/d conversion. analog channel selector if the analog input impedance is higher than 10 k ?, it is recommended to connect an external capacitor of approx. 0.1 f. analog input equivalent circuit
mb89130/130a series 42 ds07-12510-11e example characteristics (1) ?l? level output voltage (2) ?h? level output voltage (3) ?h? level input voltage/?l? level input voltage (cmos input) (4) ?h? level input voltage/?l? level input voltage (hysteresis input) v ihs : threshold when input voltage in hysteresis characteristics is set to ?h? level v ils : threshold when input voltage in hysteresis characteristics is set to ?l? level (5) pull-up resistance v ol (v) v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v i ol (ma) 012345678910 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 1.1 v cc = 2.5 v v cc = 3.0 v t a = + 25 c v ol vs. i ol v cc = 2.2 v v cc ? v oh (v) v cc = 6.0 v v cc = 5.0 v v cc = 4.0 v i oh (ma) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 1.1 v cc = 2.5 v v cc = 2.2 v 0.0 ? 0.5 ? 1.0 ? 1.5 ? 2.0 ? 2.5 ? 3.0 v cc = 3.0 v t a = + 25 c v cc ? v oh vs. i oh 0 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 v in (v) v cc (v) 1234567 t a = + 25 c v in vs. v cc v ihs v ils 0 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 v in (v) v cc (v) 1234567 t a = + 25 c v in vs. v cc 1234567 1000 r pull (k ? ) v cc (v) 300 100 50 10 0 t a = + 25 c r pull vs. v cc
mb89130/130a series ds07-12510-11e 43 (6) power supply current (external clock) (continued) 1.5 6.5 v cc (v) 5.0 i cc (ma) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 i cc1 vs. v cc 2 2.5 3 3.5 4 4.5 5 5.5 6 divide by 4(i cc1 ) divide by 64 f ch = 4.0 mhz t a = + 25 c 1.5 6.5 v cc (v) i ccs1 (ma) 0.0 i ccs1 vs. v cc 2 2.5 3 3.5 4 4.5 5 5.5 6 divide by 4( i ccs1 ) 0.5 1 1.5 2 2.5 3 i ccl ( a) v cc (v) 0 1.5 2 20 40 60 80 100 120 140 160 180 200 i ccl vs. v cc 2.5 3 3.5 4 4.5 5 5.5 6 6.5 t a = + 25 c 1.5 6.5 v cc (v) i ccls ( a) 0 i cct vs. v cc 2 2.5 3 3.5 4 4.5 5 5.5 6 5 10 15 20 25 30 t a = + 25 c 1.5 6.5 v cc (v) 50 i cct ( a) 45 40 35 30 25 20 15 10 5 0 i ccls vs. v cc 2 2.5 3 3.5 4 4.5 5 5.5 6 t a = + 25 c i r ( a) avr (v) 0 1.5 2 20 40 60 80 100 120 140 160 180 200 i r vs. avr 2.5 3 3.5 4 4.5 5 5.5 6 6.5 t a = + 25 c divide by 64 f ch = 4.0 mhz t a = + 25 c
mb89130/130a series 44 ds07-12510-11e (continued) i cch ( a) v cc (v) 0 1.5 2.0 6.5 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 i cch vs. v cc 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 t a = + 25 c i a (ma) av cc (v) 0 1.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 i a vs. av cc 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 t a = + 25 c f ch = 4 mhz
mb89130/130a series ds07-12510-11e 45 mask options *1 : both external clock and oscillation re sonator can be used on the otprom product. *2 : ?used? must be selected when p33 (39 pin) is used as sco for the peripheral control clock output. *3 : the peripheral control clock output function can be used only by software. no. part number mb89131 mb89133a mb89135a mb89p131 mb89p133a specifying procedure specify when ordering masking specify when ordering masking specify when ordering masking 1 pull-up resistors ? p00 to p07, p10 to p17, ? p30 to p37, p40 to p43 selectable by pin (p40 to p43 must be fixed to no pull-up resistor option when an a/d converter is used.) selectable by pin (p40 to p43 must be fixed to no pull-up resistor option when an a/d converter is used.) selectable by pin (p40 to p43 must be fixed to no pull-up resistor option when an a/d converter is used.) 2 power-on reset ? power-on reset provided ? no power-on reset selectable selectable selectable 3 selection of oscillation stabilization time ? the oscillation stabilization time ini- tial value is selectable from 4 types given below. 0 : oscillation stabilization 2 2 /f ch 1 : oscillation stabilization 2 12 /f ch 2 : oscillation stabilization 2 16 /f ch 3 : oscillation stabilization 2 18 /f ch selectable selectable selectable 4 reset pin output ? reset output enabled ? reset output disabled selectable selectable selectable 5 clock mode selection ? single-clock mode ? dual-clock mode selectable selectable selectable 6 selection of oscillation circuit type ? crystal or ceramic oscillation type ? external clock input type selectable selectable not required *1 7 peripheral control clock output func- tion *2 ? not used ? used selectable not required *3 not required *3
mb89130/130a series 46 ds07-12510-11e *1 : both external clock and oscillation resona tor can be used. *2 : ?used? must be selected when p33 (39 pin) is used as sco for the peripheral control clock output. *3 : the peripheral control clock output function can be used only by software. no. part number mb89p135a mb89pv130a specifying procedure set with eprom programmer setting not possible 1 pull-up resistors ? p00 to p07, p10 to p17, ? p30 to p37, p40 to p43 selectable by pin (p40 to p43 must be fixed to no pull-up resistor option.) all pins fixed to no pull-up resis- tor option 2 power-on reset ? power-on reset provided ? no power-on reset selectable power-on reset provided 3 selection of oscillation stabilization wait time ? the oscillation stabilization time ini- tial value is selectable from 4 types given below. 0 : oscillation stabilization 2 2 /f ch 1 : oscillation stabilization 2 12 /f ch 2 : oscillation stabilization 2 16 /f ch 3 : oscillation stabilization 2 18 /f ch selectable oscillation stabilization 2 18 /f ch 4 reset pin output ? reset output enabled ? reset output disabled selectable reset output enabled 5 selection of clock mode selection ? single-clock mode ? dual-clock mode selectable dual-clock mode 6 selection of oscillation circuit type ? crystal or ceramic oscillation type ? external clock input type not required *1 not required *1 7 peripheral control clock output func- tion *2 ? not used ? used not required *3 not required *3
mb89130/130a series ds07-12510-11e 47 mb89p131/p133a standard options ordering information no. product option mb89p131-101 mb89p133a-201 1 pull-up resistor not provided for any port not provided for any port 2 power-on reset provided provided 3 selection of oscillation stabiliza- tion time 2 : oscillation stabilization 2 16 /f ch 2 : oscillation stabilization 2 16 /f ch 4 reset pin output enabled enabled 5 selection of clock mode dual-clock mode dual-clock mode part number package remarks mb89131pfm mb89133apfm mb89135apfm mb89p131-101pfm mb89p133a-201pfm mb89p135a-101pfm 48-pin plastic qfp (fpt-48p-m13) mb89133ap-sh mb89p133a-201p-sh 48-pin plastic sh-dip (dip-48p-m01) MB89PV130ACF-ES 48-pin ceramic mqfp (mqp-48c-p01)
mb89130/130a series 48 ds07-12510-11e package dimensions please confirm the latest package dimension by following url. http://edevice.fujitsu.c om/package/en-search/ (continued) 4 8 -pin pl as tic qfp le a d pitch 0. 8 0 mm p a ck a ge width p a ck a ge length 10 10 mm le a d s h a pe g u llwing s e a ling method pl as tic mold mo u nting height 2. 3 5 mm max code (reference) p-qfp44-10 10-0. 8 0 4 8 -pin pl as tic qfp (fpt-4 8 p-m1 3 ) (fpt-4 8 p-m1 3 ) c 200 3 -200 8 fujit s u microelectronic s limited f4 8 02 3s -c- 3 -5 (.01 3 .002) 0. 3 20.05 0. 8 0(.0 3 1) m 0.20(.00 8 ) 0.10(.004) (.007.002) 0.170.06 10.000.20(. 3 94.00 8 ) s q 1 3 .100.40(.516.016) s q 112 1 3 24 3 7 4 8 25 3 6 index det a il s of "a" p a rt 0. 8 00.20 (.0 3 1.00 8 ) 0. 88 0.15 (.0 3 5.006) 0.25(.010) .00 8 ?.00 8 +.004 ?0.20 +0.10 0.20 ( s t a nd off) 1.95 +0.40 ?0.20 +.016 ?.00 8 .077 (mo u nting height) 0~ 8 "a" 0.10(.004) * dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s . note 1) * : the s e dimen s ion s do not incl u de re s in protr us ion. note 2) pin s width a nd pin s thickne ss incl u de pl a ting thickne ss . note 3 )pin s width do not incl u de tie ba r c u tting rem a inder.
mb89130/130a series ds07-12510-11e 49 please confirm the latest pack age dimension by following url. http://edevice.fujitsu.com/package/en-search/ (continued) 4 8 -pin pl as tic s h-dip le a d pitch 1.77 8 mm(70mil) row s p a cing 15.24mm(600mil) s e a ling method pl as tic mold 4 8 -pin pl as tic s h-dip (dip-4 8 p-m01) (dip-4 8 p-m01) c 1994-200 8 fujit s u microelectronic s limited d4 8 002 s - 3 c-4 4 3 .69 +0.20 ?0. 3 0 +.00 8 ?.012 1.720 1 3 . 8 00.25 (.54 3 .010) index-1 5.25(.207) 3 .00(.11 8 ) 0.450.10 (.01 8 .004) +.020 ?0 .0 3 9 ?0 +0.50 1.00 1.77 8 0.1 8 (.070.007) 1.77 8 (.070) max 0.250.05 (.010.002) 15.24(.600) typ 15max index-2 40. 8 94(1.610)ref max min 0.51(.020)min dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s .
mb89130/130a series 50 ds07-12510-11e (continued) please confirm the latest package dimension by following url. http://edevice.fujitsu.c om/package/en-search/ 4 8 -pin cer a mic mqfp le a d pitch 0. 8 mm le a d s h a pe s tr a ight mother b o a rd m a teri a l cer a mic mo u nted p a ck a ge m a teri a l pl as tic 4 8 -pin cer a mic mqfp (mqp-4 8 c-p01) (mqp-4 8 c-p01) c 1994-200 8 fujit s u microelectronic s limited m4 8 001 s c-4- 3 14. 8 20. 3 5 (.5 83 .014) 15.000.25 (.591.010) 17.20(.677)typ pin no.1 index .4 3 0 ?0 +.005 ?0.0 +0.1 3 10.92 1.020.1 3 (.040.005) 7.14(.2 8 1) 8 .71(. 3 4 3 ) typ typ 0. 3 0(.012)typ 4.50(.177)typ pad no.1 index 0.150.05 (.006.002) 8 .50(. 33 5)max 0.60(.024)typ 1.10 +0.45 ?0.25 +.01 8 ?.010 .04 3 0.400.0 8 (.016.00 3 ) 0. 8 00.22 (.0 3 15.00 8 7) 8 . 8 0(. 3 46)ref 1.00(.040)typ 1.50(.059)typ pin no.1 index dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s .
mb89130/130a series ds07-12510-11e 51 main changes in this edition the vertical lines marked in the left side of the page show the changes. page section change results 3, 4 features changed the name of a "standby mode". clock mode watch mode 19 handling the mb89p131/p133a/ p135a deleted the ?3. eprom programmer socket adapter?. 20 programming to the eprom with piggyback/evaluation device deleted the ?2. programming socket adapter?. ? electrical characteristics 4. ac characteristics deleted the ?(5) recommended resonator manufacturers?. 39 5. a/d converter electrical characteristics changed the items of ?zero transition voltage? and ?full-scale transition voltage?. unit : mv v remarks : avr/256 (avr ? av ss ) /256 40 6. a/d converter glossary changed the expression of ?1lsb?. avr/256 (avr ? av ss ) /256 47 ordering information changed the order informations. mb89133ap mb89133ap-sh mb89p131pfm-101 mb89p131-101pfm mb89p133apfm-201 mb89p133a-201pfm mb89p133ap-201 mb89p133a-201p-sh mb89p135apfm mb89p135a-101pfm
mb89130/130a series fujitsu microelectronics limited shinjuku dai-ichi seimei bldg., 7-1, nishishinjuku 2-chome, shinjuku-ku, tokyo 163-0722, japan tel: +81-3-5322-3347 fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ for further information please contact: north and south america fujitsu microelectronics america, inc. 1250 e. arques avenue, m/s 333 sunnyvale, ca 94085-5401, u.s.a. tel: +1-408-737-5600 fax: +1-408-737-5999 http://www.fma.fujitsu.com/ europe fujitsu microelectronics europe gmbh pittlerstrasse 47, 63225 langen, germany tel: +49-6103-690-0 fax: +49-6103-690-122 http://emea.fujitsu. com/microelectronics/ korea fujitsu microelectronics korea ltd. 206 kosmo tower building, 1002 daechi-dong, gangnam-gu, seoul 135-280, republic of korea tel: +82-2-3484-7100 fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ asia pacific fujitsu microelectronics asia pte. ltd. 151 lorong chuan, #05-08 new tech park 556741 singapore tel : +65-6281-0770 fax : +65-6281-0220 http://www.fmal.fujitsu.com/ fujitsu microelectronics shanghai co., ltd. rm. 3102, bund center, no.222 yan an road (e), shanghai 200002, china tel : +86-21-6146-3688 fax : +86-21-6335-1605 http://cn.fujitsu.com/fmc/ fujitsu microelectroni cs pacific asia ltd. 10/f., world commerce centre, 11 canton road, tsimshatsui, kowloon, hong kong tel : +852-2377-0226 fax : +852-2376-3269 http://cn.fujitsu.com/fmc/en/ specifications are subject to change without notice. for further inform ation please cont act each office. all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with sales representative s before ordering. the information, such as descri ptions of function and applicati on circuit examples, in this docum ent are presented solely for t he purpose of reference to show examples of ope rations and uses of fujits u microelectronics device; fujitsu microelectronics does not warrant proper operation of the de vice with respect to use based on such information. when you develop equipment incor porating the device based on such inform ation, you must assume any res ponsibility arising out of su ch use of the information. fujitsu microelectronics assumes no liab ility for any damages whatsoever arisi ng out of the use of the information. any information in this document, including descriptions of function and schematic di agrams, shall not be construed as license of the use or exercise of any intellectual property ri ght, such as patent right or copyright, or any other right of fujitsu microelectroni cs or any third party or does fujitsu microel ectronics warrant non-infringeme nt of any third-party's intellectual property right o r other right by using such information. fu jitsu microelectronics assumes no liability for any infringement of the intellectual property rights or other rights of third parties which w ould result from the use of in formation cont ained herein. the products described in this document are designed, developed and manufa ctured as contemplated fo r general use, including wit hout limitation, ordinary indus trial use, general office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for use accompanying fa tal risks or dangers that, unless extremely high safety is secured, could have a ser ious effect to the public, and could lead direct ly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction con trol in nuclear facility, aircraft flight contro l, air traffic control, mass tr ansport control, medical life s upport system, missile launch con trol in weapon system), or (2) for use requiring extrem ely high reliability (i.e., submersibl e repeater and artificial satellite). please note that fujitsu microelectronics will not be liable against you and/or any th ird party for any clai ms or damages arisi ng in connection with above-men tioned uses of the products. any semiconductor devices have an inherent ch ance of failure. you must protect against injury, damage or loss from such failure s by incorporating safety desi gn measures into your facility and equipment such as redundancy, fire protection, and prevention of ov er-current levels and other abnor mal operating conditions. exportation/release of any products described in this docum ent may require necessary procedures in accordance with the regulati ons of the foreign exchange and foreign trade control law of japan and/or us export control laws. the company names and brand na mes herein are the trademarks or registered trademarks of their respective owners. edited: sales promotion department

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